One factor which limits the speed of operation of computers is the requirement of delivering synchronous clock signals to modules which are physically separated. For example, it is often required that two modules M1 and M2 in FIG. 1 receive synchronous clock signals 3 from a clock CL. Clock CL delivers the clock signals 3 to a branched transmission line 6, and they travel in the direction of arrow 8.
One way to make the clock signals synchronous is to assure that they arrive at M1 and M2 simultaneously, by locating modules M1 and M2 equidistant from clock CL. (FIG. 1 does not show this.) However, in the general case, equal distances cannot be attained, for practical reasons.
When the distances are not equal, the situation shown in FIG. 1 can occur. When clock pulse P1 reaches module M2, a later pulse P4 reaches module M1. This represents non-synchronous operation, because, at any given time, the modules respond to different clock pulses. Module M1 operates four clock cycles ahead of module M2.
To attain synchronous operation, the modules can be positioned as shown in FIG. 2, wherein their pick-off points 10 are 1/2 wavelength apart, or less. With this positioning, the situation will never arise wherein one pulse, such as P1, triggers module M2 while a later pulse, such as P2, triggers module M1.
In actual practice, the modules are frequently spaced closer, at 1/10 wavelength. The physical distance which this 1/10 wavelength spacing represents will now be estimated. As a rough estimate, signal travel on both printed circuit boards (PCBs) and integrated circuits (ICs) is in the range of one-half the speed of light. A rule-of-thumb for the speed of light is one foot per nano-second, so that a clock pulse, in a PCB or IC, takes about two nano-seconds to travel one foot.
If the wavelength of the clock pulse is one foot, then one wavelength occurs every 2 nano-seconds. The frequency is then 1/(2.times.10.sup.-9), or 5.times.10.sup.8 Hz, which is 0.5 Giga-Hertz, GHz. One-tenth of this one-foot wavelength is 1.2 inches.
Thus, under the 1/10 wavelength limitation, the maximum separation between modules M1 and M2 allowed by a clock running at 0.5 GHz would be 1.2 inches. For other clock frequencies and other signal velocities, the limits on separation are computed in the same way. In general, as clock frequencies increase, the separation between modules receiving the same clock signals must be reduced. This reduction creates problems in the design of digital circuitry, because, in general, designers wish to avoid constraints on the positioning of modules such as M1 and M2.